Field of the Invention
The present invention relates to a sensing chip package and in particular relates to a backside illumination sensing chip package and a manufacturing method thereof.
Description of the Related Art
Requirements on electronic products are becoming challenging in consumers market, and therefore devices such as CMOS image sensors (Image Sensor, CIS) applied in those electronic products are keeping developed. Among various technologies, backside Illumination (Backside Illumination, BSI) and through silicon via (through silicon via, TSV) technologies are gradually emerging and becoming a focus on CISs technologies. Traditional CISs are fabricated in frontside Illumination (FSI) technology. In FSI technology, an optical diode is fabricated in front-end-of-line, and interconnections are fabricated in back-end-of-line. The interconnections are disposed above the optical diode. Therefore, lights pass through the interconnections before arrive the optical diode, and therefore interferences might occur before the optical diode detects the lights. Accordingly, resolution of traditional CISs fabricated in FSI is limited. In contrast, in BSI technology, the optical diode and the interconnections are flipped upside down in a flip packaging, and therefore lights could directly arrive the optical diode without passing through the interconnections. The flip packaging could also be applied in various device packages in addition to CIS device package. Accordingly, a more reliable electronic device package and a fabrication method thereof, which is more suitable for mass production, have become one of important issues in electronics industry.
Accordingly, this invention provides an electronic device package and a fabrication method thereof. The method of fabricating the electronic device package has simplified process operations and increased process margin (process window) such that the conductive path within the device package could be formed effectively. Therefore, the device package fabricated has higher reliability and lower cost than those of prior arts. In addition, the layout design of the connecting pads of the device could be more flexible for optimizing efficiency of the device.